During the development of numerous ASIC and FPGA solutions for our customers, Nexus has gained extensive experience developing test benches for functional verification and test pattern generation. The test benches we provide utilise various languages including Verilog, Specman 'e', assembler and C.
Our Verilog test benches provide the means to test, debug and verify designs at block and system levels. These test benches often include models to allow the simulatation of complete system environments. Some of the models we have designed include LCD, UART and DRAM blocks.
Nexus has joined the Verisity Verification Alliance, which unites Verisity with leading industry consulting firms to provide customers with test benches for verification of complex ASICs and system-on-chip designs.
As a Verification Alliance partner Nexus are commited to developing and distributing Specman elite Verification Components - eVCs.
We have in depth experience using the Verisity AMBA AHB eVC to test and verify ARM AMBA High Speed Bus interfaces.
© 2002 Nexus Electronics Ltd